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D x86 Inline Assembler![]() Differing D implementations, however, are free to innovate upon the memory model, function call/return conventions, argument passing conventions, etc. This document describes the x86 implementation of the inline assembler. AsmInstruction: Identifier : AsmInstruction align IntegerExpression even naked db Operands ds Operands di Operands dl Operands df Operands dd Operands de Operands Opcode Opcode Operands Operands Operand Operand , Operands LabelsAssembler instructions can be labeled just like other statements. They can be the target of goto statements. For example:void *pc; asm { call L1 ; L1: ; pop EBX ; mov pc[EBP],EBX ; // pc now points to code at L1 } align IntegerExpressionCauses the assembler to emit NOP instructions to align the next assembler instruction on an IntegerExpression boundary. IntegerExpression must evaluate to an integer that is a power of 2.Aligning the start of a loop body can sometimes have a dramatic effect on the execution speed. evenCauses the assembler to emit NOP instructions to align the next assembler instruction on an even boundary.nakedCauses the compiler to not generate the function prolog and epilog sequences. This means such is the responsibility of inline assembly programmer, and is normally used when the entire function is to be written in assembler.db, ds, di, dl, df, dd, deThese pseudo ops are for inserting raw data directly into the code. db is for bytes, ds is for 16 bit words, di is for 32 bit words, dl is for 64 bit words, df is for 32 bit floats, dd is for 64 bit doubles, and de is for 80 bit extended reals. Each can have multiple operands. If an operand is a string literal, it is as if there were length operands, where length is the number of characters in the string. One character is used per operand. For example:asm { db 5,6,0x83; // insert bytes 0x05, 0x06, and 0x83 into code ds 0x1234; // insert bytes 0x34, 0x12 di 0x1234; // insert bytes 0x34, 0x12, 0x00, 0x00 dl 0x1234; // insert bytes 0x34, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 df 1.234; // insert float 1.234 dd 1.234; // insert double 1.234 de 1.234; // insert extended 1.234 db "abc"; // insert bytes 0x61, 0x62, and 0x63 ds "abc"; // insert bytes 0x61, 0x00, 0x62, 0x00, 0x63, 0x00 } OpcodesA list of supported opcodes is at the end.The following registers are supported. Register names are always in upper case.
Special Cases
OperandsOperand: AsmExp AsmExp: AsmLogOrExp AsmLogOrExp ? AsmExp : AsmExp AsmLogOrExp: AsmLogAndExp AsmLogAndExp || AsmLogAndExp AsmLogAndExp: AsmOrExp AsmOrExp && AsmOrExp AsmOrExp: AsmXorExp AsmXorExp | AsmXorExp AsmXorExp: AsmAndExp AsmAndExp ^ AsmAndExp AsmAndExp: AsmEqualExp AsmEqualExp & AsmEqualExp AsmEqualExp: AsmRelExp AsmRelExp == AsmRelExp AsmRelExp != AsmRelExp AsmRelExp: AsmShiftExp AsmShiftExp < AsmShiftExp AsmShiftExp <= AsmShiftExp AsmShiftExp > AsmShiftExp AsmShiftExp >= AsmShiftExp AsmShiftExp: AsmAddExp AsmAddExp << AsmAddExp AsmAddExp >> AsmAddExp AsmAddExp >>> AsmAddExp AsmAddExp: AsmMulExp AsmMulExp + AsmMulExp AsmMulExp - AsmMulExp AsmMulExp: AsmBrExp AsmBrExp * AsmBrExp AsmBrExp / AsmBrExp AsmBrExp % AsmBrExp AsmBrExp: AsmUnaExp AsmBrExp [ AsmExp ] AsmUnaExp: AsmTypePrefix AsmExp offset AsmExp seg AsmExp + AsmUnaExp - AsmUnaExp ! AsmUnaExp ~ AsmUnaExp AsmPrimaryExp AsmPrimaryExp IntegerConstant FloatConstant __LOCAL_SIZE $ Register DotIdentifier DotIdentifier Identifier Identifier . DotIdentifierThe operand syntax more or less follows the Intel CPU documentation conventions. In particular, the convention is that for two operand instructions the source is the right operand and the destination is the left operand. The syntax differs from that of Intel's in order to be compatible with the D language tokenizer and to simplify parsing. Operand TypesAsmTypePrefix: near ptr far ptr byte ptr short ptr int ptr word ptr dword ptr float ptr double ptr extended ptrIn cases where the operand size is ambiguous, as in: add [EAX],3 ;it can be disambiguated by using an AsmTypePrefix: add byte ptr [EAX],3 ; add int ptr [EAX],7 ; Struct/Union/Class Member OffsetsTo access members of an aggregate, given a pointer to the aggregate is in a register, use the qualified name of the member:struct Foo { int a,b,c; } int bar(Foo *f) { asm { mov EBX,f ; mov EAX,Foo.b[EBX] ; } } Special Symbols
Opcodes Supported
Pentium 4 (Prescott) Opcodes Supported
AMD Opcodes Supported
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